Automated Instruction Stream Throughput Prediction for Intel and AMD Microarchit

Automated Instruction Stream Throughput Prediction for Intel and AMD MicroarchitecturesJan Laukemann∗, Julian Hammer†, Johannes Hofmann‡, Georg Hager§ and Gerhard Wellein¶ Friedrich-Alexander-Universität Erlangen-NürnbergErlangen, Germany ∗Department of Computer Sciencejan.laukemann@fau.de †Erlangen Regional Computing Centerjulian.hammer@fau.de ‡Chair of Computer Architecturejohannes.hofmann@fau.de §Erlangen Regional Computing Centergeorg.hager@fau.de ¶Erlangen Regional Computing Centergerhard