cmosvlsidesign

CMOS VLSI design 第四版， a circuits and systems perspective, 非常棒的关于cmos vlsi设计的书，作者是neil H.E.weste 和david money harris。很经典，国外的很多大学的教材！This page intentionally left blankCMOS VLSI DesignA Circuits and Systems PerspectiveFourth editionNeil H. E. WesteMacquarie university andThe University of adelaideDavid Money harrisrvey Mudu colleAddison -WesleBoslon Columbus Indianapolis New York San Francisco Upper Saddle RiverAmsterdam Cape Town Dubai London Madrid Milan Munich Paris Montreal TorontoDelhi Mexico City Sao Paulo Sydney Hong Kong Seoul Singapore Taipei TokyoEditor in Chief: Michael hirschtions editor: Matt goldsteinEditorial Assistant: Chelsea bellManaging Editor: Jeffrey HolcombSenior Production Project Manager: Marilyn LloydMedia Producer: Katelyn bollerDirector of Marketing: Margaret WaplesMarketing Coordinator: Kathryn FerrantiSenior Manufacturing Buyer: Carol melvilleSenior media buyer: ginny michaudText Designer: Susan raymondArt Director, Cover: inda knowlesCover Designer: Joyce Cosentino Wells/] Wells desigCover Image:: Cover photograph courtesy of Nick Knupffer Intel CorporationCopyright C 2009 Intel Corporation All rights reservedFull Service Vendor: Gillian Hall/ The Aardvark Group Publishing ServiceCopyeditor: Kathleen Cantwell, C4 TechnologiProofreader: Holly Mclean-AldisIndexer: Jack lewisPrinter/ binder: edwards brothersCover Printer: Lehigh-Phoenix Color/HagerstownCredits and acknowledgments borrowed from other sources and reproduced with permission in thistextbook appear on appropriate page within text or on page 838The interior of this book was set in Adobe Caslon and Trade gothicCopyright O 2011, 2005, 1993, 1985 Pearson Education, Inc., publishing as Addison-Wesley. Allrights reserved. Manufactured in the United States of America. This publication is protected byCopyright, and permission should be obtained from the publisher prilor to anvprohibitetion, storage in a retrieval system, or transmission in any form or by any means, clectronic, mechani-cal, photocopying, recording, or likewise. To obtain permission(s) to use material from this work,please submit a written request to Pearson Education, Inc, Permissions Department, 501 BoylstonStreet, Suite 900, Boston, Massachusetts 02116Many of the designations by manufacturers and sellers to distinguish their products are claimed astrademarks. Where those designations appear in this book, and the publisher was aware of a trademark claim, the designations have been printed in initial caps or all capsCataloging-in-Publication Data ison file with the library of congressAddison-Wesleyis an imprint of10987654321—EB-1413121110PEARSONISBN10:0-321-54774-8ISBN13:9780-321-54774-310 Auril, Melissa, Tamara, Nicky, ocelynMakayla, Emily, Danika, Dan and simonN WToJennifer; Samuel, and AbrahamD.M. HThis page intentionally left blankContentsPreface xxvChapter 1 Introduction1.1 A Brief History ...1.2 Preview1.3 MOS Transistors1.4 CMOS Logic1. 4. 1 The inverter 91.4.2 The NaNd gate 91.4.3 CMOS Logic Gates g1.4.4 The Nor Gate 111.4.5 Compound Gates 111.4.6 Pass Transistors and Transmission gates 121.4.7 Tristates 141.4.8 Multiplexers 151.4.9 Sequential Circuits 161.5 CMOS Fabrication and Layout....191.5.1 Tnycrtcr Cross-Scction 1 91.5.2 Fabrication Proccss 201.5.3 Layout Design Rules 241.5.4 Gate Layouts 271.5.5 Stick Diagrams 281.6 Design Partitioning291.6.1 Design Abstractions 301.6.2 Structured Design 311.6.3 Behavioral, Structural, and Physical Domains 31.7 Example: A Simple MIPS Microprocessor1.7.1 MIPS Architecture 331.7.2 Multicycle MIPS Microarchitecture 341.8 Logic Design....,381.8.1 Top-Lcvcl Intcrfaccs 381.8.2 Block Diagrams 381.8.3 Hierarchy 401.8.4 Hardware Description languages 401. 9 Circuit DesignIi Contents1.10 Physical Desig1.10.1Floplanning1.10.2 Standard Cells 481.10.3 Pitch Matching 501.10.4 Slice plans 501.10.5 Arrays 51.10.6 Area Estimation 511.11 Design Verification1.12 Fabrication, Packaging, and TestingSummary and a Look Ahead 55Exercises 57Chapter 2 Mos Transistor Theory2.1 Introduction612.2 Long-Channel I-V Characteristics2.3 C-V Characteristics2.3.1 Simple mos capacitance Models 682.3.2 Detailed Mos Gate Capacitance Model 702.3.3 Detailed Mos Diffusion Capacitance Model 722.4 Nonideal I-V Effects2.4.1 Mobility Degradation and Velocity Saturation 752.4.2 Channel Length Modulation 782. 4.3 Threshold Voltage effects 792.4.4 Leakage 802.4.5 Temperature Dependence 852.4.6 Geometry Dependence 862.4.7 Summary 862.5 DC Transfer Characteristics872.5. 1 Static Cmos Inverter dc characteristics 882.5.2 Beta Ratio Effects 902.5.3 Noise Margin 912.5.4 Pass Transistor DC Characteristics 922.6 Pitfalls and FallaciesSummary 94Exercises 95Chapter 3 CMOS Processing Technology3.1 Introduction3.2 CMOS Technologies1003. 2.1 Wafer Formation 1003.2.2 Photolihy101Contents ix3.2.3 Well and channel formation1033.2.4 Silicon Dioxide(SiO2) 1053.2.5 Isolation 1063.2.6 Gate Oxide 1073.2.7 Gate and Source/ Drain formations 1083.2.8 Contacts and metallization 1103.2.9 Passivation 1123.2.10 Metrology 1123.3 Layout Design Rules.1133.3.1 Design Rule background 1133.3.2 Scribe line and Other Structures 1163.3.3 MOSIS Scalable CMOS Dcsign Rules 1173.3.4 Micron Design Rules 1183.4 CMOS Process Enhancements...1193.4.1 Transistors 1193.4.2 Interconnect 1223.4, 3 Circuit elements 1243.4.4 Beyond Conventional CMOs 1293.5 Technology-Related CAD Issues1303.5.1 Dcsign Rulc Checking(Drc) 1313.5.2 Circuit Extraction 1323.6 Manufacturing Issues1333.6.1 Antenna rules 1333.6.2 Laycr Density Rulcs 1.343.6.3 Resolution enhancement rules 1343.6.4 Metal Slotting Rules 1353.6.5 Yield Enhancement Guidelines 1353.7 Pitfalls and Fallacies..1363.8 Historical Perspective137Summary 139Exercises 139Chapter 4 Delay4.1 Introduction1414.1.1 Definitions 1414.1.2 Timing Optimization 1424.2 Transient Response1434.3 RC Delay Model....1464.3.1 Effective resistance 1464.3.2 Gate and Diffusion Capacitance 1474.3.3 Equivalent RC Circuits 1474.3.4 Transient Response 1484.3.5 Elmore Delay 150