74LS244(2)
Theseoctalbuffersandlinedriversaredesignedspecificallytoimproveboththeperformanceanddensityofthree-statememoryaddressdrivers,clockdrivers,andbus-orientedreceiversandtransmitters.Thedesignerhasachoiceofselectedcombinationsofinvertingandnoninvertingoutputs,symmetrical,active-lowoutput-control
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